Inside the AI Switch: Co-Packaged Optics Moves From Lab Demo to Liquid-Cooled Fabric

For a decade, AI cluster networking climbed bandwidth by packing faster SerDes into switch ASICs and stuffing denser pluggable modules onto the front panel. That recipe still works—until heat, reach, and rack watts collide. At 800G and especially at 1.6T port rates, the short copper path from ASIC ball map to a distant OSFP cage starts to look like a power and signal-integrity tax rather than a convenient serviceability feature. Co-packaged optics (CPO) answers by moving the optical engines onto the same package substrate as the switch silicon, converting to light millimeters from the die.

October 2026 marked a visible shift from roadmap slides to systems you can point at on an OCP show floor. Celestica introduced the DS6005, a fully liquid-cooled CPO Ethernet switch built on Broadcom’s Tomahawk 6 – Davisson platform. NVIDIA, at GTC Berlin, tied Spectrum-X Ethernet Photonics and Spectrum-6 CPO systems to a supply-chain expansion for optical engines. Dell’Oro’s OCP read-out framed the same week as CPO entering early commercialization—not mass adoption yet, but no longer only a lab poster.

This article stays inside the hall: how CPO changes the AI switch, what vendors actually shipped or announced in autumn 2026, how power and liquid cooling intertwine with denser racks (including the pressure described in The 1 MW Rack), and what operators should ask before treating CPO as a drop-in for every leaf. It deliberately does not reopen the InfiniBand-versus-Ethernet protocol war—see our earlier fabric primer, InfiniBand vs Ethernet for AI Clusters—and it does not cover multi-campus DCI or coherent ZR long-haul; those are a different optical problem.

Why pluggable optics hit a wall in AI fabrics

Pluggable optics won the last era for good reasons: field replaceability, multi-vendor modules, and a clean separation between switch silicon and optics supply chains. In an AI back-end fabric, however, every watt spent fighting electrical loss on the board is a watt not spent on GPUs, and every millimeter of high-speed copper raises the chance of equalization complexity, retimers, and thermal hotspots at the faceplate.

SK hynix’s October 2026 tech note (authored with academic contributors) puts the physics plainly: as switch capacity and port speeds rise, the electrical path from ASIC to front-panel cages becomes a growing challenge for power and signal integrity. CPO shortens that path by placing the optical engine next to the ASIC on a shared package substrate, then letting fiber handle the longer hop. Meta’s ECOC 2025 evaluation of a CPO switch system, cited in that note, reported roughly 65% lower power in the optical interconnect portion versus a comparable pluggable architecture under the published test conditions—an important data point, not a universal guarantee for every SKU.

NVIDIA’s Spectrum-X Ethernet Photonics technical blog (January 2026) goes further on vendor-claimed deltas for its CPO path: 5× power reduction per 1.6 Tb/s port versus pluggable interconnects, 5× longer link flap-free AI uptime versus off-the-shelf Ethernet solutions, and 10× greater network resiliency in NVIDIA’s framing. Those are NVIDIA’s published claims for its Photonically integrated Spectrum-X design; operators should treat them as vendor metrics pending independent cluster measurements, but they explain why hyperscalers are willing to re-open the serviceability debate.

What “CPO switch” means in practice

A production CPO AI switch is more than a die photo. The system stack typically includes:

1. Switch ASIC — today’s examples center on Broadcom Tomahawk 6–class Ethernet silicon and NVIDIA Spectrum-6.
2. Co-packaged optical engines — silicon-photonics converters adjacent to the ASIC.
3. External laser source (ELS) — continuous-wave light delivered off-package so lasers do not cook the hottest die area; Celestica and NVIDIA both emphasize field-replaceable or detachable laser/fiber approaches for service.
4. Thermal and mechanical design — almost always liquid cooling at the densities OCP ORv3 AI racks demand.
5. Software — SONiC or vendor NOS with CPO-aware inventory, laser health, and fiber mapping.

Celestica’s 12 October 2026 announcement lists the DS6005 at up to 102.4 Tbps switching capacity, 64 × 1.6TbE optically enabled ports, a compact 1.5OU ORv3 form factor, full liquid cooling, and SONiC support. Broadcom’s Optical Systems Division is quoted describing the work as moving CPO from advanced architecture to a production-ready system through partnership on Tomahawk 6–Davisson. Celestica framed the platform for both scale-up and scale-out AI networking—meaning the same optical density conversation now sits next to GPU pods and leaf-spine scale-out, not only classic front-end Ethernet.

NVIDIA’s Spectrum-6 family, documented across its SN6000 hardware materials and Photonics blog, spans pluggable and CPO form factors. The SN6810-LD is described as a Spectrum-6 silicon-photonics (CPO) liquid-cooled system delivering 102.4 Tb/s with MMC-16 fiber connectivity; the SN6800-class multi-ASIC Photonics system is positioned at 409.6 Tb/s with integrated fiber shuffle for high-radix scale-out. The Photonics blog highlights detachable surface-normal fiber attach and solder-reflow–compatible optical engines screened before attach—manufacturing details that matter if CPO is to escape boutique volumes.

October 2026: early commercialization, not ubiquity

Timing matters because the industry finally has concurrent, dated proof points:

• 12 October 2026 — Celestica DS6005 launch timed to OCP Global Summit 2026 (12–15 October).
• 19 October 2026 — Dell’Oro’s OCP optics note: NVIDIA Spectrum-X Ethernet Photonics switches moving into production with early customer adoption; Celestica’s DS6005 as a liquid-cooled Broadcom Davisson CPO system; near-packaged optics (NPO) and pluggable density still in the mix. Dell’Oro explicitly warns that early commercialization is not broad adoption—qualification, yields, serviceability, and shipment volumes remain the metrics to watch.
• 21 October 2026 — NVIDIA Newsroom: with SPIL, NVIDIA plans to expand Taiwan optical-engine capacity for co-packaged optics, targeting a 15× increase by mid-2027 and aiming for another doubling by end-2028. (SDxCentral covered the same GTC Berlin briefing the same week; the 15× figure is stated in NVIDIA’s own release.)

That supply-chain line is the industrial tell. You do not book mid-2027 optical-engine capacity expansions unless CPO SKUs are leaving the engineering sample tray. Equally, Dell’Oro’s caution is the operator tell: CPO will coexist with pluggables and NPO for years. Arista’s rack-scale outlook cited in the same Dell’Oro piece sketches density paths from OSFP-based designs toward much higher petabit-per-rack optical integration—architectural outlook, not proof that every leaf ships CPO tomorrow.

Power, liquid cooling, and the hyperscale rack

CPO is an AI Energy & Power Systems story as much as a photonics story. Celestica’s launch quotes lean hard on power, thermal management, latency, and reach as co-equal constraints. Liquid cooling is not a fashion accessory on the DS6005 or on NVIDIA’s SN68xx-LD Photonics systems; it is how you keep a CPO package and a high-radix ASIC inside a 1.5OU–2RU envelope without roasting the optical engines.

That intersects directly with rack-level power density. As AI factories push toward megawatt-class racks and busbar DC distribution, network gear that wastes watts on board-level SerDes equalization competes with GPUs for the same thermal and electrical budget. Operators already wrestling with 1 MW rack design envelopes should treat CPO evaluation as part of the same spreadsheet: watts per useful bit delivered to the GPU NIC, not watts per marketing port.

Meta’s reported ECOC result (~65% optical-interconnect power reduction versus pluggable in that test) and NVIDIA’s claimed 5× per-1.6T-port reduction are different methodologies and products—but they point the same direction. The unanswered operational question is lifecycle cost: ELS modules, fiber shuffle complexity, spare strategy, and whether a failed optical engine forces a whole switch RMA or a field laser/fiber service action. Celestica’s emphasis on field-replaceable external laser modules and NVIDIA’s detachable fiber narrative are attempts to answer that objection before it kills deployment.

Manufacturing, yield, and why supply chains suddenly matter

CPO’s hardest problems are not only optical. They are industrial. Pluggable modules can be burned in, inventoried, and swapped independently of the switch ASIC. Co-packaging couples photonics yield to switch yield unless manufacturers invent process tricks. NVIDIA’s Photonics blog emphasizes solder-reflow–compatible engines that can be fully screened before attach, detachable surface-normal fiber for late-stage automated assembly, and a manufacturing path aimed at high package yield. Those details sound prosaic next to terabit headlines; they are what separate a demo tray from a SKU a contract manufacturer can schedule.

Celestica’s Broadcom partnership language similarly stresses collaboration across silicon, optical engines, packaging, thermal design, manufacturing, and system integration. That list is the real bill of materials for CPO: miss any one discipline and the switch remains a science project. The 21 October 2026 NVIDIA–SPIL capacity plan—15× optical-engine capacity targeted by mid-2027, with an aim to double again by end-2028, per NVIDIA’s Newsroom—reads as a bet that those manufacturing tricks are ready to scale. SDxCentral’s same-day coverage of the GTC Berlin briefing repeats the figure in industry-press form; the primary attribution for this article is NVIDIA’s release.

For buyers, capacity headlines are a mixed signal. More engines suggest lower future lead times—and also that near-term supply will be allocated to the largest AI factory programs first. Mid-market neoclouds evaluating DS6005-class or Spectrum Photonics systems should ask explicitly about 2027 allocation, ELS spare pools, and whether optics are single-sourced.

Pluggables, NPO, and CPO: a coexistence map

It is tempting to narrate CPO as destiny. Dell’Oro’s OCP 2026 optics synthesis rejects that simplicity. Pluggable OSFP ecosystems continue to climb in density; near-packaged optics (NPO) sits as an intermediate mechanical approach; open CPO/NPO and related XPO paths appear in rack-scale architecture discussions (including Arista’s density outlook from current OSFP-based petabit-per-rack figures toward multi-petabit targets as an architectural path—not as proof of volume shipment). The practical fabric plan for 2026–2028 is therefore tiered:

• Front-end and low-risk leaves may stay pluggable for years, preserving familiar sparing.
• High-radix AI scale-out spines and power-constrained middle-of-row switches are the first CPO candidates.
• Experimental Ethernet scale-up domains may adopt CPO where copper length and power collapse inside the rack—without confusing that choice with NVLink-class memory fabrics.

Operators should also remember that CPO does not choose InfiniBand or Ethernet for them. It changes the physical layer and power envelope of whatever packet fabric they already selected. Protocol features—congestion control, adaptive routing, RDMA profile—still dominate job completion time once photons leave the package. Packaging and protocols are coupled only through watts and port density.

Reliability narratives versus fleet reality

Vendor reliability claims deserve a dedicated skepticism pass. NVIDIA publishes 5× longer flap-free AI uptime and 10× resiliency versus off-the-shelf Ethernet baselines for Spectrum-X Ethernet Photonics. Meta’s ECOC 2025 CPO evaluation, as summarized by SK hynix, stressed both power reduction (~65% in the optical interconnect portion under test) and connection stability over extended operation in those conditions. None of those results absolve an operator from measuring mean time between optical interventions in their fiber plant, with their cleaning discipline and their vibration/EMI environment.

CPO shifts the failure domain. Dust on an MMC connector, a marginal ELS channel, or a packaging thermal gradient can look like “the fabric is bad” to NCCL even when the ASIC pipeline is healthy. Runbooks must grow optical OTDR-like instincts next to PFC/ECN dashboards. Training for NOC staff is part of the TCO that slideware omits.

How CPO changes AI cluster networking design

Radix and topology. Higher bandwidth in a smaller OU count lets architects thicken leaf radix or collapse tiers. NVIDIA’s multi-ASIC Photonics SN6800 story (409.6 Tb/s, integrated shuffle) is explicitly about flat scale-out for large GPU counts. Celestica’s 64×1.6T in 1.5OU targets the same density pressure from the Broadcom ecosystem.

Reach and fiber plant. CPO does not erase fiber engineering. Single-mode MMC or equivalent cabling, polarity, and connector cleanliness become first-class NOC skills. Failures migrate from “swap the QSFP” to “diagnose package vs ELS vs trunk.”

Software and observability. SONiC support on DS6005 matters because hyperscale AI fabrics already standardize on open NOS features for buffering, ECN, and AI-aware load balance. CPO health must appear in the same telemetry plane as queue depth—laser bias, temperature, and optical power are now fabric KPIs.

Scale-up versus scale-out optics. Vendors increasingly blur language: the same CPO switch silicon may sit in scale-out spines or in denser scale-up domains as copper runs out of steam inside the rack. That does not make CPO a substitute for NVLink-class memory fabrics; it means Ethernet scale-up experiments and high-radix scale-out will share an optical packaging roadmap. Protocol choice remains a separate decision—again, see InfiniBand vs Ethernet for AI Clusters.

Coexistence. Dell’Oro’s OCP synthesis is the sober baseline: pluggables keep pushing density; NPO sits between; CPO wins where power and radix justify a new service model. A rational AI factory bill of materials in 2027 may mix all three by tier.

What to demand in a CPO pilot

Operators planning a qualification wave after OCP 2026 should insist on evidence, not slogans:

1. Watts per 800G/1.6T equivalent under NCCL- or MLPerf-like traffic, measured in the same rack thermal envelope as production.
2. Link flap and optical brownout rates over multi-week soak—NVIDIA’s flap-free uptime claims set a bar others must meet or contextualize.
3. Service time for ELS or fiber attach failures versus whole-system swap.
4. Multi-vendor fiber and connector policy—or an honest single-source fiber plant plan.
5. NOS feature parity with the pluggable SKU you already trust (ECN, adaptive routing, buffering, AI telemetry).
6. Supply commitment aligned to mid-2027 optical-engine capacity curves—NVIDIA/SPIL’s stated 15× optical-engine capacity target by mid-2027 (NVIDIA Newsroom, 21 October 2026) is a useful industry signal even if you never buy Spectrum-X.

Outlook

Co-packaged optics for AI cluster networking has crossed a threshold: liquid-cooled CPO switches with named ASICs, OCP-timed launches, Photonics product families, and optical-engine capacity plans measured in mid-2027 multiples. That is early commercialization, not the end of pluggables. The winners will be teams that score CPO on job completion time and joules per token inside real GPU fabrics—while keeping fiber operations as disciplined as GPU liquid loops.

For hyperscale builders, the strategic question is no longer “is CPO real?” It is “which fabric tiers deserve CPO first, and how does that interact with megawatt rack power and cooling envelopes?” Answer that with pilots, not keynotes—and keep protocol debates, campus DCI, and packaging physics in separate workstreams so each can move at its own speed.

Related reading

• The 1 MW Rack: How 800V DC and Warm-Water Cooling Are Rewiring the AI Factory
• InfiniBand vs Ethernet for AI Clusters
• Ultra Ethernet 1.1: When AI Ethernet Grows Scale-Up Headers, Collectives, and Programmable Congestion
• How Distributed AI Superfactories Stretch the Network Between Campuses

Images: original illustrations generated for AndBeyond.Tech; no logos or real people depicted.